Updating 003 rack system firmware

With 40-core nodes, the maximum is an 80-core system.The system control unit provides redundant system master clocks and redundant system master service processors (FSPs).Each SCM has dual memory controllers to support up to 1 TB of memory and utilize up to 128 GB off-chip e DRAM L4 (off-chip) cache.

The IBM Power System E870 POWER8 system node uses either 8-core or 10-core symmetric multiprocessing (SMP) processor chips with 512 KB of L2 and 8 MB of L3 cache per core, DDR3 CDIMM memory, dual memory controllers, and an industry-standard G3 PCIe I/O bus designed to use 32 lanes organized in two sets of x16.

The peak memory and I/O bandwidths per system node have increased over 300% compared to POWER7 ™ servers.

Each SCM contains two memory controllers per processor module.

Four 4.02 GHz 8-core SCMs or four 4.19 GHz 10-core SCMs are used in each system node, providing either 32 cores (#EPBA) or 40 cores (#EPBC).

The processors, memory, and base I/O are packaged within the system nodes. The new POWER8 processor single chip modules (SCM) are provided in each system node.

Last modified 05-Jul-2019 01:40